High-speed serial interface technology is one of the key technologies in the current high-speed data transmission field. A feed-forward-equalizer (Feed Forward Equalizer, FFE) is an important high-speed serial interface module circuitry. This paper designed a 3-Tap FFE, working in 40Gbps for high-speed serial circuit, in TSMC 65nm CMOS. The tap numbers of FFE, Summer Circuit and Delay Element were analyzed. A delay cell based on LC network, matched impedance, and feedback were used to obtain the lowest power consumption and the best Equalizer performance. The 40Gb/S 3-Tap FFE chip was designed, and post-layout simulation results showed that, at 40 Gb/S input rate, the FFE has a Balance Capacity of 20dB, in TT-27 ℃ craft corner, 1.0V power supply voltage with 51.52mw power.