论文题目:A 2.4GHz Low Power PLL Frequency Synthesizer with I/Q LO Outputs
作者:Yuduo Zuo, Baoyong Chi, Zhihua Wang
期刊:Microelectronics
年份:2005.13-15 Dec.
卷(期)及页码:pp. 6 - 9
摘要:
A 2.4GHz low power PLL frequency synthesizer with I/Q LO outputs is presented. VCO of the synthesizer oscillates at 4.8GHz, and a divide-by-2 divider is used to generate quadrature I/Q outputs. With ILFD (Injection Locked Frequency Divider) technique and an optimized dual-modulus divide-by-2/3 divider, the power consumption of the synthesizer is reduced effectively. The design has been implemented in 0.18-μm CMOS. Simulation results show that the synthesizer can provide 2.25~2.55GHz quadrature I/Q outputs with phase noise of -90 dBc/Hz @100KHz. The settling time is less than 30uS, and the current consumption is only 4.2mA.