A 50 Hz analog-to-digital converter ( ADC) with the precision of 15 bit for the pixel level implementation in the CMOS image sensor was presented． The ADC adopts charge reset technique to balance the charge packet，and the analog-to-digital conversion is achieved through counting charge packets． The circuit system，the design of the core modules and layout placement are comprehensive considered and specially optimized for the low power，low noise and small area． The ADC has an area of50 μm × 50 μm in a standard 0. 18 μm CMOS process． The test results show that when the input currents are 17. 5，33. 7 and 80 nA，the mean values /the standard deviations of the output code are 8 875 /6. 56，16 500 /2. 6，32 768 /14. 3，respectively． The simulation results show that the ADC totally consumes4. 5 μW with the full scale input current of 80 nA．