An optimization design of JTAG on-line debug system was presented through the analysis of the main factors that affected system performance. The host computer PC of the optimization system issued debug commands to the debugger via the USB interface, the debugger generated the JTAG timing to achieve on-chip debug and program download function. In addition，the on-chip JTAG debug logic and off-chip memory download function had been optimized to improve the debugger speed of the system and the download speed of the off-chip memory.