This paper presents a full-digital vector control integrated circuit(IC) for permanent magnet synchronous motor (PMSM) with considering hardware structure. We adopted top-down and modular partitioning logic optimization design. Design specification of space vector pulse width modulation (SVPWM) unit, vector coordinate transformation are illustrated. All of the modules were implemented with pure hardware and designed with Verilog hardware description language (HDL). Moreover, the proposed design was verified by Simulink-Matlab and field programmable gate array (FPGA).