A low-power wideband hybrid automatic gain control (AGC) loop for a GNSS receiver is presented. Single AGC in the I/Q path is composed of four-stage programmable gain amplifiers (PGAs), a differential peak detector, two comparators, control algorithm logic, a decoder and the reference voltage source. Besides being controlled by AGC loop, the gain of PGAs could be alternatively controlled by off-chip digital baseband processor through SPI interface. To obtain low power consumption and noise, an improved source degenerated amplifier is adopted, and the I/Q path phase mismatch within ±5o range is calibrated with 0.2o accuracy. Implemented in 65nm CMOS, the measured PGAs total gains range from 9.8dB to 59.5dB with an average step of 0.95dB and simulated bandwidth of more than 110MHz. The settling time is about 180μs with 80% AM input with measured signal power from -76.7dBm to -56.6dBm from radio-frequency amplifier (RFA) input port, and also reduces to 90μs with clock frequency doubling. The single AGC consumes almost 0.8mA current from the 2.5-V supply and occupies an area of 750×300μm2.