This paper presents a 400MS/s 12-bit CMOS current-steering digital-to-analog converter (DAC). The proposed DAC adapts 6+2+4 segmented architecture and modified switching scheme to improve dynamic and static performance. The measured spurious-free dynamic range (SFDR) is up to 77.18 dB at 400MS/s with 10MHz input signal. The maximum full-scale output current is 35mA with 1.8V single power supply. The core area occupies 0.6 mm2 in a standard 1P-6M 0.18μm CMOS process