A 1.2V 0.1-3GHz software-defined radio (SDR) receiver front-end in 130nm CMOS is presented. It consists of a wideband LNA, a wideband transconductance amplifier, a passive current-driven mixer with 25% duty-cycle LO generator and a like Tow-Thomas transimpedance biquad cell with reconfigurable gain and bandwidth. Performance programmability with conversion gain from 35dB to 55dB and baseband bandwidth from 3.5MHz to 50MHz is achieved while enabling power consumption scalability simultaneously. With measured noise figure between 3.5dB and 6dB, OIP3 over 10dBm in concerned bands, the total chip draws 14.5-48.5mA from a 1.2 V supply.