A semi-digital phase-interpolator based CDR isimplemented in 0.18μm CMOS. By employing a cascadedarchitecture, versatile CDR operation is achieved. Thefirst-stage CDR provides fast acquisition even with largeinitial frequency difference, followed by the second-stageCDR to further improve the time margin for phasetracking. An adaptive algorithm is used to change thephase resolution of the second stage depending on inputfrequency offsets, while it optimizes the phase resolutionto a best case of 10 bit for small frequency difference.With the first-stage output always available, fast coarsephase acquisition is guaranteed, which is useful for fastsystem wake up.