This paper describes a quantization noise reduction method for ΔΣ based digitally-controlled ring oscillators (DCRO). A concept of the hybrid finite-impulse response (FIR) filter from the fractional-N PLL is extended to the DCRO design. Thanks to the parallel operation, the proposed filter based noise reduction method does not cause any additional latency to the digital PLL. Both behavioral and circuit-level simulations are performed, showing that out-of-band phase noise or short-term jitter caused by the ΔΣ modulator can be significantly reduced with the proposed method.