A uniform interpolation process and its hardware implementation solution are proposed in this paper.By introducing parallel calculation unit,memory access unit,local memory and pipe-line technology,it will take the proposed design 5.7 MHz working frequency to achieve the interpolation process for a 30 f/s(frame/second) CIF video stream.The speed of the proposed circuit is 26 times of a pure software implementation.The decoder is fabricated in 0.18 μm CMOS process.The interpolation hardware consists of 35k gates.