Passive capacitor error averaging is an inherently linear capacitor mismatch calibration technigue for pipelined analog-to-digital conversion，but its conversion speed is halved because of double sampling and double transferring.An improved capacitor error averaging technigue is presented to make the conversion faster. The conversion speed is improved through the reduction of the number of the clock phases reguired for one conversion and the time allocated for one clock phase. Circuits analysis and MATLAB simulation indicate that the speed can be typically improved by more than 52% or 64% when the OTA is switched-capacitor commonmode feed back or not. The improved technigue is ideal for appllcations of high-speed，high-resolution，and continuous operation.