Both nMOS and pMOS transistors with two-edged and multi-finger layouts are fabricated in a standard commercial 0.6 μm CMOS/bulk process to study their total ionizing dose (TID) radiation effects. The leakage current, threshold voltage shift, and transconductance of the devices are monitored before and after γ-ray irradiation.Different device bias conditions are used during irradiation. The experiment results show that TID radiation effects on nMOS devices are very sensitive to their layout structures. The impact of the layout on TID effects on pMOS devices is slight and can be neglected.