In an era of massive IoT, ultra-low-voltage and ultra-low-power wireless transceivers powered directly by energy harvesters, e.g. solar cells at 0.5V, are highly demanded to remove battery recharging or replacement cost. Due to the stringent requirement on gain, linearity and noise, it is very challenging for the RX to operate at 0.5V, especially for the opamp and PLL with more active circuits. Prior efforts have been made to reduce the voltage and power of BLE transceivers [1]–[5]. Even though the BLE TRX in [3] reports good sensitivity and blocker resilience at 0.5V supply with 22nm FDSOI CMOS, it has difficulty in achieving low noise and spur performance with the ADPLL and robust performance with the opamp-based analog baseband (ABB) under ULV. As shown in the top of Fig. 1, the lowest power of Cartesian BLE RX is about 2mW [1]–[3]. The phase-tracking receiver (PTRX) was proposed to minimize power [4], [5], but the linear feedback loop with a multi-bit ADC [4] or a comparator followed by a digital loop filter (DLF) [5] suffers from stability issue to satisfy adjacent channel rejection (ACR). Moreover, the open-loop modulation in [4], [5] is not suitable for a long packet length in BLE 5 because of frequency drift and pulling. In this work, a 0.5V fully-integrated BLE transceiver using 1-bit delay-based demodulation is proposed with hybrid PLL (HPLL)-based closed-loop modulation to support 1 and 2Mb/s date rate and long packet length of BLE 5. Employing the bias-current-free HPLL and the ULV OTA with the 1-bit demodulation, the proposed 0.5V TRX meets the BLE requirements including blocker and sensitivity with the lowest RX power and smallest area among existing BLE TRXs with on-chip matching and closed-loop modulation, which is promising for low-cost energy-harvesting IoT applications.