This paper describes a crystal-less heterodyne phase-tracking receiver (PTRX) architecture that offers a wide tracking range, flexible yet robust loop dynamics, and a 1-bit demodulation output. Unlike the sliding-IF PTRX, a nested integer-N bang-bang phase-locked loop (BBPLL) is implemented within the PTRX to enhance the tracking range by taking the output of an intermediate-frequency (IF) voltage-controlled oscillator (VCO) as an input. The BBPLL also performs phase-to-digital conversion with an oversampled 1-bit digital output. To further improve the demodulation performance, a dual-path injection method with extra control inversion is employed. In the proposed heterodyne PTRX, a phase offset over frequency variation is minimized in the IF mixer. As a result, the mixer-based phase detector in the proposed PTRX has lower gain variation over frequency changes even with a type-I loop, resulting in stable loop dynamics. In this paper, the frequency-tracking and phase-tracking properties of the PTRX are analyzed in view of the jitter transfer and jitter tolerance characteristics of a clock-and-data recovery (CDR) circuit for the first time. The proposed 2.4-GHz PTRX is implemented in 65-nm CMOS, consuming 3.0 mW from a 0.9-V supply. The receiver achieves a sensitivity of –83 dBm at 1 Mb/s.