In this paper, the method of using Volterra series expansion to analyze the linearity of high frequency CMOS transconductance stage with source degeneration resistor is provided. In order to reduce the complexity of the analysis, the transconductance stage is treated as cascade connection of two nonlinear systems. The IIP3 （input referred third-order intercept point） of the transconductance stage is calculated. The MOS model used includes short-channel effects, gatesource capacitance, gate-drain capacitance, and output resistance. Comparison is made among analytical results, simulation results and measurement results.