The nonlinearities and some general structures of charge pump are briefly discussed in the paper. An improved differential charge pump based on negative feedback is then presented. It comprises two charge/discharge blocks, a common-mode feedback （CMFB） block and a bias circuit. The negative feedback circuit makes the input effectively track the output, achieving a high up/down current matching regardless of output voltage. The CMFB circuit is utilized to reduce the common-mode disturbance of differential output lines by stabilizing the static operation solution. In order to test charge pump＇s influence in a PLL, a charge pump prototype is implemented using a 0. 25 um 2. 5 V CMOS technology, and the other blocks in PLL loop are modeled based on verilogA language. Simulation and calculation shows that the charge pump has a 〈0. 01% mismatching in 0. 3-2.3 V range, and a 〈-75 dBc spur level in a 100 kHz loop bandwidth, which is suitable for high performance PLL.